A 335 μ W - 72 dBm Receiver for FSK Back - Channel Embedded in 5 . 8 GHz
نویسندگان
چکیده
An ULP back-channel receiver is presented that demodulates binary a FSK back-channel signal embedded in 5.8GHz IEEE 802.11a Wi-Fi OFDM packets. The architecture of the back-channel receiver employs a two-step downconversion where the first mixing stage downconverts using the 3rd harmonic of the LO for power efficiency. The LP-65nm CMOS receiver consumes 335μW with a sensitivity of -72dBm at a BER of 10−3 and data-rate of 31.25kb/s. The radio uses a balun and a 250kHz reference crystal as external components. The receiver uses a 1V supply voltage for analog blocks, and 0.85V for digital blocks including the LO and FLL.
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